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<a href="#define-members">Macros</a> &#124;
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<div class="title">xospipsv_control.h File Reference</div>  </div>
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Macros</h2></td></tr>
<tr class="memitem:gad5d4884f3757c314991e0d72bf344c59"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__ospipsv__api.html#gad5d4884f3757c314991e0d72bf344c59">XOSPIPSV_LOWLEVEL_H_</a></td></tr>
<tr class="memdesc:gad5d4884f3757c314991e0d72bf344c59"><td class="mdescLeft">&#160;</td><td class="mdescRight">&lt; prevent circular inclusions  <a href="group__ospipsv__api.html#gad5d4884f3757c314991e0d72bf344c59">More...</a><br/></td></tr>
<tr class="separator:gad5d4884f3757c314991e0d72bf344c59"><td class="memSeparator" colspan="2">&#160;</td></tr>
</table><table class="memberdecls">
<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="func-members"></a>
Functions</h2></td></tr>
<tr class="memitem:ga6af9f098248cd39891e92d9caa1d75c8"><td class="memItemLeft" align="right" valign="top">u32&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__ospipsv__api.html#ga6af9f098248cd39891e92d9caa1d75c8">XOspiPsv_Stig_Read</a> (<a class="el" href="struct_x_ospi_psv.html">XOspiPsv</a> *InstancePtr, <a class="el" href="struct_x_ospi_psv___msg.html">XOspiPsv_Msg</a> *Msg)</td></tr>
<tr class="memdesc:ga6af9f098248cd39891e92d9caa1d75c8"><td class="mdescLeft">&#160;</td><td class="mdescRight">Flash command based data reading using flash command control registers.  <a href="group__ospipsv__api.html#ga6af9f098248cd39891e92d9caa1d75c8">More...</a><br/></td></tr>
<tr class="separator:ga6af9f098248cd39891e92d9caa1d75c8"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga1b1a6b7fd20d9183ad58f84d3303eeec"><td class="memItemLeft" align="right" valign="top">u32&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__ospipsv__api.html#ga1b1a6b7fd20d9183ad58f84d3303eeec">XOspiPsv_Stig_Write</a> (<a class="el" href="struct_x_ospi_psv.html">XOspiPsv</a> *InstancePtr, <a class="el" href="struct_x_ospi_psv___msg.html">XOspiPsv_Msg</a> *Msg)</td></tr>
<tr class="memdesc:ga1b1a6b7fd20d9183ad58f84d3303eeec"><td class="mdescLeft">&#160;</td><td class="mdescRight">Flash command based data write using flash command control registers.  <a href="group__ospipsv__api.html#ga1b1a6b7fd20d9183ad58f84d3303eeec">More...</a><br/></td></tr>
<tr class="separator:ga1b1a6b7fd20d9183ad58f84d3303eeec"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga9f70d70b4dcd8a325a7dacc3aa31a5ef"><td class="memItemLeft" align="right" valign="top">u32&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__ospipsv__api.html#ga9f70d70b4dcd8a325a7dacc3aa31a5ef">XOspiPsv_Dac_Read</a> (<a class="el" href="struct_x_ospi_psv.html">XOspiPsv</a> *InstancePtr, <a class="el" href="struct_x_ospi_psv___msg.html">XOspiPsv_Msg</a> *Msg)</td></tr>
<tr class="memdesc:ga9f70d70b4dcd8a325a7dacc3aa31a5ef"><td class="mdescLeft">&#160;</td><td class="mdescRight">Reads the data using Linear controller.  <a href="group__ospipsv__api.html#ga9f70d70b4dcd8a325a7dacc3aa31a5ef">More...</a><br/></td></tr>
<tr class="separator:ga9f70d70b4dcd8a325a7dacc3aa31a5ef"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gadb1ae4f737c07e890039cdaf3a006b26"><td class="memItemLeft" align="right" valign="top">u32&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__ospipsv__api.html#gadb1ae4f737c07e890039cdaf3a006b26">XOspiPsv_Dac_Write</a> (<a class="el" href="struct_x_ospi_psv.html">XOspiPsv</a> *InstancePtr, const <a class="el" href="struct_x_ospi_psv___msg.html">XOspiPsv_Msg</a> *Msg)</td></tr>
<tr class="memdesc:gadb1ae4f737c07e890039cdaf3a006b26"><td class="mdescLeft">&#160;</td><td class="mdescRight">Writes the data Using Linear controller.  <a href="group__ospipsv__api.html#gadb1ae4f737c07e890039cdaf3a006b26">More...</a><br/></td></tr>
<tr class="separator:gadb1ae4f737c07e890039cdaf3a006b26"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gab882c01ec4fd29b29a58e0a07075414d"><td class="memItemLeft" align="right" valign="top">u32&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__ospipsv__api.html#gab882c01ec4fd29b29a58e0a07075414d">XOspiPsv_Dma_Read</a> (<a class="el" href="struct_x_ospi_psv.html">XOspiPsv</a> *InstancePtr, <a class="el" href="struct_x_ospi_psv___msg.html">XOspiPsv_Msg</a> *Msg)</td></tr>
<tr class="memdesc:gab882c01ec4fd29b29a58e0a07075414d"><td class="mdescLeft">&#160;</td><td class="mdescRight">Reads the data using DMA.  <a href="group__ospipsv__api.html#gab882c01ec4fd29b29a58e0a07075414d">More...</a><br/></td></tr>
<tr class="separator:gab882c01ec4fd29b29a58e0a07075414d"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga621f2c47a2e8fdf59de28b2333d6da6f"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__ospipsv__api.html#ga621f2c47a2e8fdf59de28b2333d6da6f">XOspiPsv_FifoRead</a> (<a class="el" href="struct_x_ospi_psv.html">XOspiPsv</a> *InstancePtr, <a class="el" href="struct_x_ospi_psv___msg.html">XOspiPsv_Msg</a> *Msg)</td></tr>
<tr class="memdesc:ga621f2c47a2e8fdf59de28b2333d6da6f"><td class="mdescLeft">&#160;</td><td class="mdescRight">Reads data from RX FIFO.  <a href="group__ospipsv__api.html#ga621f2c47a2e8fdf59de28b2333d6da6f">More...</a><br/></td></tr>
<tr class="separator:ga621f2c47a2e8fdf59de28b2333d6da6f"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga54d82d31820cd30d9c32055380e0ab04"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__ospipsv__api.html#ga54d82d31820cd30d9c32055380e0ab04">XOspiPsv_FifoWrite</a> (<a class="el" href="struct_x_ospi_psv.html">XOspiPsv</a> *InstancePtr, <a class="el" href="struct_x_ospi_psv___msg.html">XOspiPsv_Msg</a> *Msg)</td></tr>
<tr class="memdesc:ga54d82d31820cd30d9c32055380e0ab04"><td class="mdescLeft">&#160;</td><td class="mdescRight">Writes data to TX FIFO.  <a href="group__ospipsv__api.html#ga54d82d31820cd30d9c32055380e0ab04">More...</a><br/></td></tr>
<tr class="separator:ga54d82d31820cd30d9c32055380e0ab04"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gafb4ad780fc9faa2f91aa7208ceb91583"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__ospipsv__api.html#gafb4ad780fc9faa2f91aa7208ceb91583">XOspiPsv_Setup_Stig_Ctrl</a> (const <a class="el" href="struct_x_ospi_psv.html">XOspiPsv</a> *InstancePtr, u32 Cmd_op, u32 Rd_data_en, u32 Num_rd_data_bytes, u32 Cmd_addr_en, u32 Mode_bit_en, u32 Num_addr_bytes, u32 Wr_data_en, u32 Num_wr_data_bytes, u32 Dummy, u32 Membank_en)</td></tr>
<tr class="memdesc:gafb4ad780fc9faa2f91aa7208ceb91583"><td class="mdescLeft">&#160;</td><td class="mdescRight">Configures the STIG control register (Flash cmd register).  <a href="group__ospipsv__api.html#gafb4ad780fc9faa2f91aa7208ceb91583">More...</a><br/></td></tr>
<tr class="separator:gafb4ad780fc9faa2f91aa7208ceb91583"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaa347217a72ad5240a86eb29dacec9270"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__ospipsv__api.html#gaa347217a72ad5240a86eb29dacec9270">XOspiPsv_Setup_Dev_Write_Instr_Reg</a> (const <a class="el" href="struct_x_ospi_psv.html">XOspiPsv</a> *InstancePtr, const <a class="el" href="struct_x_ospi_psv___msg.html">XOspiPsv_Msg</a> *Msg)</td></tr>
<tr class="memdesc:gaa347217a72ad5240a86eb29dacec9270"><td class="mdescLeft">&#160;</td><td class="mdescRight">Configures the below info to write instruction register DataXfertype - SPI/Dual/Quad/Octal AddrXfertype - 3 or 4B.  <a href="group__ospipsv__api.html#gaa347217a72ad5240a86eb29dacec9270">More...</a><br/></td></tr>
<tr class="separator:gaa347217a72ad5240a86eb29dacec9270"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaf618dd1d9a3b5fe6a60feedd9cfca12b"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__ospipsv__api.html#gaf618dd1d9a3b5fe6a60feedd9cfca12b">XOspiPsv_Setup_Dev_Read_Instr_Reg</a> (const <a class="el" href="struct_x_ospi_psv.html">XOspiPsv</a> *InstancePtr, const <a class="el" href="struct_x_ospi_psv___msg.html">XOspiPsv_Msg</a> *Msg)</td></tr>
<tr class="memdesc:gaf618dd1d9a3b5fe6a60feedd9cfca12b"><td class="mdescLeft">&#160;</td><td class="mdescRight">Configures the below info to read instruction register DataXfertype - SPI/Dual/Quad/Octal AddrXfertype - 3 or 4B.  <a href="group__ospipsv__api.html#gaf618dd1d9a3b5fe6a60feedd9cfca12b">More...</a><br/></td></tr>
<tr class="separator:gaf618dd1d9a3b5fe6a60feedd9cfca12b"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gab0a1fd4b1edb33eeb7f14588f09a8355"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__ospipsv__api.html#gab0a1fd4b1edb33eeb7f14588f09a8355">XOspiPsv_Setup_Devsize</a> (const <a class="el" href="struct_x_ospi_psv.html">XOspiPsv</a> *InstancePtr, const <a class="el" href="struct_x_ospi_psv___msg.html">XOspiPsv_Msg</a> *Msg)</td></tr>
<tr class="memdesc:gab0a1fd4b1edb33eeb7f14588f09a8355"><td class="mdescLeft">&#160;</td><td class="mdescRight">Sets the device size config register.  <a href="group__ospipsv__api.html#gab0a1fd4b1edb33eeb7f14588f09a8355">More...</a><br/></td></tr>
<tr class="separator:gab0a1fd4b1edb33eeb7f14588f09a8355"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga4eb9614740f6df4c7a372d9125d5b5e1"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__ospipsv__api.html#ga4eb9614740f6df4c7a372d9125d5b5e1">XOspiPsv_Start_Indr_RdTransfer</a> (const <a class="el" href="struct_x_ospi_psv.html">XOspiPsv</a> *InstancePtr)</td></tr>
<tr class="memdesc:ga4eb9614740f6df4c7a372d9125d5b5e1"><td class="mdescLeft">&#160;</td><td class="mdescRight">Initiates the indirect read transfer.  <a href="group__ospipsv__api.html#ga4eb9614740f6df4c7a372d9125d5b5e1">More...</a><br/></td></tr>
<tr class="separator:ga4eb9614740f6df4c7a372d9125d5b5e1"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gae199f0006d6d3282aad2a18c4e87d479"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__ospipsv__api.html#gae199f0006d6d3282aad2a18c4e87d479">XOspiPsv_Config_IndirectAhb</a> (const <a class="el" href="struct_x_ospi_psv.html">XOspiPsv</a> *InstancePtr, const <a class="el" href="struct_x_ospi_psv___msg.html">XOspiPsv_Msg</a> *Msg)</td></tr>
<tr class="memdesc:gae199f0006d6d3282aad2a18c4e87d479"><td class="mdescLeft">&#160;</td><td class="mdescRight">Configures the Indirect controller.  <a href="group__ospipsv__api.html#gae199f0006d6d3282aad2a18c4e87d479">More...</a><br/></td></tr>
<tr class="separator:gae199f0006d6d3282aad2a18c4e87d479"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga7dd7305678eaea4774657b38046cc5e4"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__ospipsv__api.html#ga7dd7305678eaea4774657b38046cc5e4">XOspiPsv_Config_Dma</a> (const <a class="el" href="struct_x_ospi_psv.html">XOspiPsv</a> *InstancePtr, const <a class="el" href="struct_x_ospi_psv___msg.html">XOspiPsv_Msg</a> *Msg)</td></tr>
<tr class="memdesc:ga7dd7305678eaea4774657b38046cc5e4"><td class="mdescLeft">&#160;</td><td class="mdescRight">Sets up the Dma configuration.  <a href="group__ospipsv__api.html#ga7dd7305678eaea4774657b38046cc5e4">More...</a><br/></td></tr>
<tr class="separator:ga7dd7305678eaea4774657b38046cc5e4"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaa2f584dfcca76360b59188e58c60b770"><td class="memItemLeft" align="right" valign="top">u32&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__ospipsv__api.html#gaa2f584dfcca76360b59188e58c60b770">XOspiPsv_Exec_Dma</a> (const <a class="el" href="struct_x_ospi_psv.html">XOspiPsv</a> *InstancePtr)</td></tr>
<tr class="memdesc:gaa2f584dfcca76360b59188e58c60b770"><td class="mdescLeft">&#160;</td><td class="mdescRight">Initiates the DMA transfer.  <a href="group__ospipsv__api.html#gaa2f584dfcca76360b59188e58c60b770">More...</a><br/></td></tr>
<tr class="separator:gaa2f584dfcca76360b59188e58c60b770"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga8bb2848b91c02f54adca66fae6820e7e"><td class="memItemLeft" align="right" valign="top">u32&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__ospipsv__api.html#ga8bb2848b91c02f54adca66fae6820e7e">XOspiPsv_Exec_Flash_Cmd</a> (const <a class="el" href="struct_x_ospi_psv.html">XOspiPsv</a> *InstancePtr)</td></tr>
<tr class="memdesc:ga8bb2848b91c02f54adca66fae6820e7e"><td class="mdescLeft">&#160;</td><td class="mdescRight">Executes the Flash command configured using Flash Command control register.  <a href="group__ospipsv__api.html#ga8bb2848b91c02f54adca66fae6820e7e">More...</a><br/></td></tr>
<tr class="separator:ga8bb2848b91c02f54adca66fae6820e7e"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga289baf1466add8dfa4a70a3952354cd7"><td class="memItemLeft" align="right" valign="top">u32&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__ospipsv__api.html#ga289baf1466add8dfa4a70a3952354cd7">XOspiPsv_CheckOspiIdle</a> (const <a class="el" href="struct_x_ospi_psv.html">XOspiPsv</a> *InstancePtr)</td></tr>
<tr class="memdesc:ga289baf1466add8dfa4a70a3952354cd7"><td class="mdescLeft">&#160;</td><td class="mdescRight">Checks for OSPI idle which means Serial interface and low level SPI pipeline is IDLE.  <a href="group__ospipsv__api.html#ga289baf1466add8dfa4a70a3952354cd7">More...</a><br/></td></tr>
<tr class="separator:ga289baf1466add8dfa4a70a3952354cd7"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga943852604b61a80a53f42a143bf87241"><td class="memItemLeft" align="right" valign="top">u32&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__ospipsv__api.html#ga943852604b61a80a53f42a143bf87241">XOspiPsv_WaitForLock</a> (const <a class="el" href="struct_x_ospi_psv.html">XOspiPsv</a> *InstancePtr, u32 Mask)</td></tr>
<tr class="memdesc:ga943852604b61a80a53f42a143bf87241"><td class="mdescLeft">&#160;</td><td class="mdescRight">Waits for bit to be set.  <a href="group__ospipsv__api.html#ga943852604b61a80a53f42a143bf87241">More...</a><br/></td></tr>
<tr class="separator:ga943852604b61a80a53f42a143bf87241"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga3ac73304cb055f7184181eb4b176637e"><td class="memItemLeft" align="right" valign="top">u32&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__ospipsv__api.html#ga3ac73304cb055f7184181eb4b176637e">XOspiPsv_ExecuteRxTuning</a> (<a class="el" href="struct_x_ospi_psv.html">XOspiPsv</a> *InstancePtr, <a class="el" href="struct_x_ospi_psv___msg.html">XOspiPsv_Msg</a> *FlashMsg, u32 TXTap)</td></tr>
<tr class="memdesc:ga3ac73304cb055f7184181eb4b176637e"><td class="mdescLeft">&#160;</td><td class="mdescRight">Performs RX Tuning for SDR/DDR mode to calculate RX DLL Delay.  <a href="group__ospipsv__api.html#ga3ac73304cb055f7184181eb4b176637e">More...</a><br/></td></tr>
<tr class="separator:ga3ac73304cb055f7184181eb4b176637e"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gabef79236b8c8e5ada4f6ddb58132e35c"><td class="memItemLeft" align="right" valign="top">u32&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__ospipsv__api.html#gabef79236b8c8e5ada4f6ddb58132e35c">XOspiPsv_CalculateRxTap</a> (<a class="el" href="struct_x_ospi_psv.html">XOspiPsv</a> *InstancePtr, <a class="el" href="struct_x_ospi_psv___msg.html">XOspiPsv_Msg</a> *FlashMsg, u8 *AvgRXTap, u8 *MaxWindowSize, u8 DummyIncr, u32 TXTap)</td></tr>
<tr class="memdesc:gabef79236b8c8e5ada4f6ddb58132e35c"><td class="mdescLeft">&#160;</td><td class="mdescRight">Calculates the Max window size and the corresponding Average Rx Tap.  <a href="group__ospipsv__api.html#gabef79236b8c8e5ada4f6ddb58132e35c">More...</a><br/></td></tr>
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<tr class="memitem:gacb2c9597040e54b985ddf380365af639"><td class="memItemLeft" align="right" valign="top">u32&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__ospipsv__api.html#gacb2c9597040e54b985ddf380365af639">XOspiPsv_ConfigureTaps</a> (const <a class="el" href="struct_x_ospi_psv.html">XOspiPsv</a> *InstancePtr, u32 RxTap, u32 TxTap)</td></tr>
<tr class="memdesc:gacb2c9597040e54b985ddf380365af639"><td class="mdescLeft">&#160;</td><td class="mdescRight">Configures the Rx and Tx taps in Phy Configuration register.  <a href="group__ospipsv__api.html#gacb2c9597040e54b985ddf380365af639">More...</a><br/></td></tr>
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<tr class="memitem:ga8400388c80d471a4535fa7357104f07b"><td class="memItemLeft" align="right" valign="top">u32&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__ospipsv__api.html#ga8400388c80d471a4535fa7357104f07b">XOspiPsv_IDac_Write</a> (const <a class="el" href="struct_x_ospi_psv.html">XOspiPsv</a> *InstancePtr, const <a class="el" href="struct_x_ospi_psv___msg.html">XOspiPsv_Msg</a> *Msg)</td></tr>
<tr class="memdesc:ga8400388c80d471a4535fa7357104f07b"><td class="mdescLeft">&#160;</td><td class="mdescRight">Writes data in Non-DMA Indirect mode.  <a href="group__ospipsv__api.html#ga8400388c80d471a4535fa7357104f07b">More...</a><br/></td></tr>
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